 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| ADVANCED LINEAR DEVICES, INC. ALD1712A/ALD1712B ALD1712 RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER GENERAL DESCRIPTION The ALD1712 is a monolithic precision operational amplifier intended primarily for a wide range of analog applications in +5V single power supply and 5V dual power supply systems as well as +6V to 12V battery operated systems. All device characteristics are specified for +5V single supply or 2.5V dual supply systems. It is manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process and is available as a standard cell in ALD's ASIC "Function-Specific" library. The device has an input stage that operates to +300mV above and -300mV below the supply voltages with no adverse effects and/or phase reversals. The ALD1712 has been developed specifically with the 5V single supply or 2.5V dual supply user in mind. Several important characteristics of the device make many applications easy to implement for these supply voltages. First, the operational amplifier can operate with rail-to-rail input and output voltages. This feature allows numerous analog serial stages to be implemented without losing operating voltage margin. Secondly, the device was designed to accommodate mixed applications where digital and analog circuits may work off the same 5V power supply. Thirdly, the output stage can drive up to 400pF capacitive, and 1K resistive loads in non-inverting unity gain connection, and up to 4000pF at a gain of 5. These features, coupled with extremely low input currents, high voltage gain, useful bandwidth of 1.5MHz, slew rate of 2.1V/s, low power dissipation, low offset voltage and temperature drift, make the ALD1712 a truly versatile, user friendly, operational amplifier. On-chip offset voltage trimming allows the device to be used without nulling in most applications. The device offers typical offset drift of less than 5V/ C which eliminates many trim or temperature compensation circuits. For precision applications, the 1712 is designed to settle to 0.01% in 8s. The unique characteristics at input and output are modeled in an available macromodel. FEATURES * Linear mode operation with input voltages 300mV beyond supply rails * Symmetrical complementary output drive * Output voltages to within 2mV of power supply rails * High load capacitance capability -4000pF typical * No frequency compensation required -unity gain stable * Extremely low input bias currents -0.01pA typical * Dual power supply 2.5V to 6.0V * Single power supply +5V to +12V * High voltage gain - typically 85V/mV @ 2.5V and 250V/mV @ 5.0V * Drive as low as 1K load with 5mA drive current * Output short circuit protected * Unity gain bandwidth of 1.5MHz * Slew rate of 2.1V/s APPLICATIONS * * * * * * * * * * * * * * Voltage amplifier Voltage follower/buffer Charge integrator Photodiode amplifier Data acquisition systems High performance portable instruments Signal conditioning circuits Sensor and transducer amplifiers Low leakage amplifiers Active filters Sample/Hold amplifier Picoammeter Current to voltage converter Coaxial cable driver ORDERING INFORMATION -55C to +125C 8-Pin CERDIP Package ALD 1712A DA ALD 1712B DA ALD 1712 DA Operating Temperature Range 0C to +70C 0C to +70C 8-Pin Small Outline Package (SOIC) ALD 1712 ASA ALD 1712 BSA ALD 1712 SA 8-Pin Plastic Dip Package ALD 1712A PA ALD 1712B PA ALD 1712 PA PIN CONFIGURATION N/C -IN +IN V1 2 3 4 TOP VIEW DA, PA, SA PACKAGE * N/C Pin is connected internally. Do not connect externally. 8 2 7 6 5 N/C VS OUT N/C * Contact factory for industrial temperature range (c) 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com ABSOLUTE MAXIMUM RATINGS Supply voltage, V+ Differential input voltage range Power dissipation Operating temperature range PA,SA package DA package Storage temperature range Lead temperature, 10 seconds 13.2V -0.3V to V+ +0.3V 600 mW 0C to +70C -55C to +125C -65C to +150C +260C OPERATING ELECTRICAL CHARACTERISTICS T A = 25C VS = 2.5V unless otherwise specified Parameter Supply Voltage Input Offset Voltage Input Offset Current Input Bias Current Input Voltage Range Input Resistance Input Offset Voltage Drift Power Supply Rejection Ratio Common Mode Rejection Ratio Symbol VS V+ VOS IOS IB VIR RIN TCV OS PSRR 65 65 65 65 -0.3 -2.8 1013 Min 2.0 4.0 0.05 0.01 0.01 1712A Typ Max 6.0 12.0 0.15 0.35 10 280 10 280 5.3 +2.8 -0.3 -2.8 1013 Min 2.0 4.0 0.1 0.01 0.01 1712B Typ Max Min 1712 Typ Max 6.0 12.0 0.25 0.01 0.01 -0.3 -2.8 10 13 0.5 1.0 10 280 10 280 5.3 +2.8 Unit V mV mV pA pA pA pA V V V/C dB dB dB dB RS 100K RS 100K 0C TA +70C RS 100K 0C TA +70C RL = 10K RL 1M RL = 10K 0C TA +70C RL = 1M V+ = +5V 0C TA +70C RL = 10K 0C TA +70C Test Conditions Single Supply RS 100K 0C TA +70C TA = 25C 0C TA +70C TA = 25C 0C TA +70C V+ = +5; notes 2,5 VS = 2.5V 6.0 2.0 12.0 4.0 0.25 0.55 10 280 10 280 5.3 +2.8 5 85 85 83 83 65 65 65 65 5 85 85 83 83 63 63 63 63 5 85 85 83 83 CMRR Large Signal Voltage Gain AV 50 20 85 400 50 20 85 400 50 20 85 400 V/mV V/mV V/mV Output Voltage Range VO low VO high VO low VO high ISC 4.99 2.35 0.002 0.01 4.998 -2.44 -2.35 2.44 8 0.002 0.01 0.002 0.01 4.99 4.998 4.99 4.998 -2.44 -2.35 -2.44 -2.35 2.35 2.44 2.35 2.44 8 8 V V V V mA Output Short Circuit Current Supply Current Power Dissipation Input Capacitance Bandwidth Slew Rate Rise time Overshoot Factor IS PD CIN BW SR tr 1.0 1.4 0.8 1.5 0.8 1.5 0.8 1.5 mA VIN = 0V No Load VS = 2.5V 4.0 7.5 4.0 7.5 4.0 7.5 mW 1 1.5 2.1 0.2 10 1.0 1.4 1 1.5 2.1 0.2 10 1.0 1.4 1 1.5 2.1 0.2 10 pF MHz V/s s % AV = +1 RL = 10K RL = 10K RL = 10K CL = 100pF ALD1712A/ALD1712B ALD1712 Advanced Linear Devices 2 OPERATING ELECTRICAL CHARACTERISTICS (cont'd) TA = 25C VS = 2.5V unless otherwise specified 1712A Parameter Maximum Load Capacitance Symbol CL Min Typ 400 4000 Max Min 1712B Typ 400 4000 Max Min 1712 Typ 400 4000 Max Unit pF pF Test Conditions Gain = 1 Gain = 5 Input Noise Voltage en 26 26 26 nV/Hz f =1KHz Input Current Noise in 0.6 0.6 0.6 fA/Hz f =10Hz Settling Time ts 8.0 3.0 8.0 3.0 8.0 3.0 s s 0.01% 0.1% AV = -1 RL = 5K CL = 50pF TA = 25C VS = 5.0V unless otherwise specified Parameter Power Supply Rejection Ratio Common Mode Rejection Ratio Large Signal Voltage Gain Output Voltage Range Bandwidth Slew Rate Symbol PSRR Min 1712A Typ 83 Max Min 1712B Typ 83 Max Min 1712 Typ 83 Max Unit dB Test Conditions RS 100K CMRR 83 83 83 dB RS 100K AV VO low VO high BW SR 250 250 250 V/mV RL = 10K RL = 10K 4.80 -4.90 4.93 1.7 2.8 -4.80 4.80 -4.90 4.93 1.7 2.8 -4.80 -4.90 4.80 4.93 1.7 2.8 -4.80 V MHz V/s AV =+1 CL =50pF V S = 2.5V -55C TA +125C unless otherwise specified Parameter Input Offset Voltage Input Offset Current Input Bias Current Power Supply Rejection Ratio Common Mode Rejection Ratio Large Signal Voltage Gain Output Voltage Range Symbol VOS IOS IB PSRR CMRR AV VO low VO high 60 60 10 83 83 25 0.1 4.9 0.2 4.8 Min 1712A DA Typ Max 0.5 1.0 4.0 4.0 60 60 10 83 83 25 0.1 4.9 0.2 4.8 Min 1712B DA Typ Max 0.8 1.5 4.0 4.0 60 60 10 83 83 25 0.1 4.9 0.2 Min 1712 DA Typ Max 1.2 2.5 4.0 4.0 Unit mV nA nA dB dB V/mV V V RS 100K RS 100K RL = 10K RL 10K RL 10K Test Conditions RS 100K 4.8 ALD1712A/ALD1712B ALD1712 Advanced Linear Devices 3 Design & Operating Notes: 1. The ALD1712 CMOS operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. In a conventional CMOS operational amplifier design, compensation is achieved with a pole splitting capacitor together with a nulling resistor. This method is, however, very bias dependent and thus cannot accommodate the large range of supply voltage operation as is required from a stand alone CMOS operational amplifier. The ALD1712 is internally compensated for unity gain stability using a novel scheme that does not use a nulling resistor. This scheme produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. A unity gain buffer using the ALD1712 will typically drive 400pF of external load capacitance without stability problems. In the inverting unity gain configuration, it can drive up to 800pF of load capacitance. Compared to other CMOS operational amplifiers, the ALD1712 has shown itself to be more resistant to parasitic oscillations. 2. The ALD1712 has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. This means that with the ranges of common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. To maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5V above the negative supply voltage. Since offset voltage trimming on the 1712 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2.5 (5V operation), where the common mode voltage does not make excursions below this switching point. The user should however, be aware that this switching does take place if the operational amplifier is connected as a unity gain buffer and should make provision in his design to allow for input offset voltage variations. 3. The input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pA at room temperature. This low input bias current assures that the analog signal from the source will not be distorted by input bias currents. Normally, this extremely high input impedance of greater than 1012 would not be a problem as the source impedance would limit the node impedance. However, for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. The output stage consists of class AB complementary output drivers, capable of driving a low resistance load. The output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. When connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. The ALD1712 operational amplifier has been designed to provide full static discharge protection. Internally, the design has been carefully implemented to minimize latch up. However, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. In using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3V of the power supply voltage levels. TYPICAL PERFORMANCE CHARACTERISTICS COMMON MODE INPUT VOLTAGE RANGE AS A FUNCTION OF SUPPLY VOLTAGE 7 OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF SUPPLY VOLTAGE AND TEMPERATURE 1000 COMMON MODE INPUT VOLTAGE RANGE (V) 5 4 3 2 1 0 0 1 2 3 4 5 6 7 OPEN LOOP VOLTAGE GAIN (V/mV) 6 TA = 25C } -55C } +25C 100 } +125C 10 RL= 10K RL= 5K 1 0 2 4 SUPPLY VOLTAGE (V) 6 SUPPLY VOLTAGE (V) INPUT BIAS CURRENT AS A FUNCTION OF AMBIENT TEMPERATURE 1000 SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE 5 INPUTS GROUNDED OUTPUT UNLOADED INPUT BIAS CURRENT (pA) 10 SUPPLY CURRENT (mA) 100 VS = 2.5V 4 3 2 1 0 TA = -55C -25C +25C +80C +125C 1.0 0.1 0.01 -50 -25 0 25 50 75 100 125 AMBIENT TEMPERATURE (C) 0 1 2 3 4 5 6 SUPPLY VOLTAGE (V) ALD1712A/ALD1712B ALD1712 Advanced Linear Devices 4 TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT VOLTAGE SWING AS A FUNCTION OF SUPPLY VOLTAGE 120 OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF FREQUENCY 100 80 60 40 20 0 -20 VS = 2.5V TA = 25C 0 45 90 135 180 1 10 100 1K 10K 100K 1M 10M 7 OUTPUT VOLTAGE SWING (V) 6 5 4 3 2 0 RL = 10K RL = 10K RL = 2K 1 2 3 4 5 6 7 OPEN LOOP VOLTAGE GAIN (db) 25C TA 125C PHASE SHIFT IN DEGREES SUPPLY VOLTAGE (V) FREQUENCY (Hz) INPUT OFFSET VOLTAGE AS A FUNCTION OF AMBIENT TEMPERATURE REPRESENTATIVE UNITS INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE AS A FUNCTION OF COMMON MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE (mV) 6 4 2 0 -2 -4 -6 VS = 2.5V TA = 25C +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -50 -25 0 +25 +50 VS = 2.5V +75 +100 +125 -2 -1 0 +1 +2 +3 AMBIENT TEMPERATURE (C) COMMON MODE INPUT VOLTAGE (V) OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF LOAD RESISTANCE 1000 LARGE - SIGNAL TRANSIENT RESPONSE 5V/div OPEN LOOP VOLTAGE GAIN (V/mV) 100 VS = 2.5V TA = 25C VS = 2.5V TA = 25C RL = 10K CL = 50pF 10 1V/div 1 1K 10K 100K 1000K 2s/div LOAD RESISTANCE () VOLTAGE NOISE DENSITY AS A FUNCTION OF FREQUENCY 150 SMALL - SIGNAL TRANSIENT RESPONSE 100mV/div VS = 2.5V TA = 25C RL = 10K CL = 50pF VOLTAGE NOISE DENSITY (nV/ Hz) 125 100 75 50 25 VS = 2.5V TA = 25C 20mV/div 0 10 100 1K 10K 100K 1000K 2s/div FREQUENCY (Hz) ALD1712A/ALD1712B ALD1712 Advanced Linear Devices 5 TYPICAL APPLICATIONS RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER 5V 0.1F VIN 0 VIN 5V * See rail to rail waveform + CL 400pF OUTPUT RL =10K RAIL-TO-RAIL WAVEFORM ~ ZIN = 1012 INPUT +5V 0V +5V OUTPUT 0V Performance waveforms. Upper trace is the output of a Wien Bridge Oscillator. Lower trace is the output of Railto-Rail voltage follower. LOW OFFSET SUMMING AMPLIFIER PHOTO DETECTOR CURRENT TO VOLTAGE CONVERTER RF = 5M 50K 10K INPUT 1 INPUT 2 10K GAIN = 5 * Circuit Drives Large Load Capacitance 4000pF + - 2.5V .01F CL = 4000pF OUTPUT +2.5V .01F I PHOTODIODE +2.5V VOUT = I x RF + -2.5V RL = 10K WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL) SINE WAVE GENERATOR +2.5V OUTPUT RAIL-TO-RAIL VOLTAGE COMPARATOR +5V VIN +5V 50K 0.1F OUTPUT + .01F C = .01F R = 10K ~ f= 1 -2.5V 10K 10K 2RC ~ 1.6KHz 10K + 10M * See rail to rail waveform ULTRA LONG TIME CONSTANT INTEGRATOR INTEGRATOR VOLTAGE PRESET 20K 20K 5V Relay 1 1/2 ALD2301 5V 2 1 t2 0.1 V = 1/RC 4 6 0.1 -5 V * LOW LEAKAGE CAPACITOR e.g. TEFLON CAPACITOR TYPE K11B104KSW Component Research Inc. * All capacitance values are in F unless otherwise specified. * RELAYS 1 & 2 are of type 4705, Gordos Corporation. 7 4 t1 VIN = dt 5V 1/2 ALD2301 Control 2 Control 1 C* +5V 2 - VIN R Relay 2 8 3 ALD1712 7 + 1.5V 3 + + 6 5 1.5V ALD1712A/ALD1712B ALD1712 Advanced Linear Devices 6 |
Price & Availability of ALD1712SA
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |